This is just a collecting place for information and interesting projects using the Cypress FX2 and FX3 devices.
Wolfgang Weiser’s FX2 Oscilloscope¶
Notes regarding the design:
- The mainboard uses IC1A/B to detect FIFO overflows. This is currently unused.
- It also uses IC1C/D to create 180o shifted clocks for the ADC sample/latch clocks.
- The clock generator is actually an ATTiny13. To do 10MS/sec the part needs to be clocked at 20MHz, which means 5V supply.
- 10MHz is always on
clock0. It drives the ADC, latches and USB_IFCLK. MUST BE GLITCH FREE.
clock1is constant low for 10MS/sec, every other clock0 for 5MS/sec, every 10th for 1MS/sec. It drives
USB_RDY1which is the FX2
SLWRsignal in FIFO slave mode
- The ADC has a bit of a pipeline; the digital output is from a sample 3 clocks prior so if you’re using analog and digital inputs you will see the analog lag the digital by 3 clocks
- The latch is used to ensure the data is stable for the FX2.
- ADCTL pin 4/5 are used to select sensitivity (1V/2V) and int/ext reference, although there is no circuitry for external reference support.
- The analog input is assumed to be DC coupled with 2.5V bias (assuming a 5V system). An external amp/level shifter is required if you expect it to be a real scope.
- Digital inputs use input buffers to protect the system. You can also switch from CMOS to TTL (or whatever else) by replacing the HC driver with HCT or whatever.
- The latch on the digital input board is used to ensure all inputs are sampled and held for the FX2.